Ten years ago, I supported Sun’s microprocessor organization. The buzz those days was around something called “UltraSPARC I”, our first 64 bit RISC microprocessor. At that time, the industry was focused on the 32 bit CISC architecture; so, UltraSPARC 1 was considered a very significant advance in microprocessor technology.
Last year, we released an entirely new microprocessor – the “UltraSPARC T-1”, which Sun is using in it’s latest UltraSPARC server offerings. The T-1 incorporates a CMT (chip multi-threading) design containing 8 cores capable of running 4 threads each for a total of 32 threads with stellar throughput and performance gains. (For my non-technical brethren, it’s an amazing bit of innovation for the compute world. Trust me, just say “chip multi-threading” at your next cocktail party when speaking to an IT professional – they will be impressed).
As with UltraSPARC 1, the UltraSPARC T-1 is another example of breakthrough microprocessor technology. But this time, it isn’t just the technology that is so unique, it’s also the change in our business model. Because simultaneous with the release of the T-1 based systems, we also released the T-1 design to the world under an OSI approved open source license as part of the OpenSPARC program.
As a result, this innovative design is now available to anyone under a GPL (General Public License). Under this license, developers can take the T-1 design as expressed in verilog (which is actually similar to source code in the software world) and create modifications or entirely new designs that they are free to distribute and monetize without payment of royalties to Sun.
While open source in the context of software has been with us for more than 15 years, this is the first time that a microprocessor design has been made available under an open source license. Within our legal team, there was a question as to whether the open source (software) model would work in the hardware world. A significant amount of effort went into determining which license was appropriate, the structure of the governance model and understanding any third party technology included in the verilog that could inhibit our ability to release under a free or open source license. Because hardware has a longer development cycle, we have been waiting for an indication that this concept – open source for hardware – would work.
We recently received our first validation when a company called Simply RISC released a design based on a single T-1 core. What’s interesting here is that Simply RISC has taken the T-1 design, originally targeted at high-end systems, and used it to create entirely new market opportunities for embedded systems.
More to come…